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| 5-V Low-Drop Voltage Regulator TLE 4275 Features * * * * * * * * * Output voltage 5 V 2% Very low current consumption Power-on and undervoltage reset Reset low down to VQ = 1 V Very low-drop voltage Short-circuit-proof Reverse polarity proof Suitable for use in automotive electronics ESD protection > 4 kV Ordering Code Package P-TO252-5-1 (SMD) P-TO263-5-1 (SMD) P-TO220-5-11 P-TO220-5-12 P-TO263-5-1 P-TO252-5-1 Type * TLE 4275 D Q67006-A9354 * TLE 4275 G Q67006-A9343 * TLE 4275 * New type Functional Description Q67000-A9342 * TLE 4275 S Q67000-A9442 The TLE 4275 is a monolithic integrated low-drop voltage regulator in a 5 pin TO-package. An input voltage up to 45 V is regulated to VQ,nom = 5.0 V. The IC is able to drive loads up to 450 mA and is short-circuit proof. At overtemperature the TLE 4275 is turned off by the incorporated temperature protection. A reset signal is generated for an output voltage VQ,rt of typ. 4.65 V. The delay time can be programmed by the external delay capacitor. P-TO220-5-11 P-TO220-5-12 Data Sheet Version 1.3 1 2001-04-24 TLE 4275 Dimensioning Information on External Components The input capacitor CI is necessary for compensation of line influences. Using a resistor of approx. 1 in series with CI, the oscillating of input inductivity and input capacitance can be damped. The output capacitor CQ is necessary for the stability of the regulation circuit. Stability is guaranteed at values CQ 22 F and an ESR of 5 within the operating temperature range. Circuit Description The control amplifier compares a reference voltage to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents any oversaturation of the power element. The IC also incorporates a number of internal circuits for protection against: * Overload * Over-temperature * Reverse polarity Data Sheet Version 1.3 2 2001-04-24 TLE 4275 P-TO252-5-1 (D-PAK) GND P-TO220-5-11 P-TO220-5-12 1 RO DQ 5 AEP02580 P-TO263-5-1 (SMD) GND Q RO D IEP02527 GND Q RO D AEP02756 GND Q D RO IEP02528 Figure 1 Pin Configuration (top view) Pin Definitions and Functions Pin No. 1 2 3 4 5 Symbol Function I RO GND D Q Input; block to ground directly at the IC by a ceramic capacitor. Reset Output; open collector output Ground; Pin 3 internally connected to heatsink Reset Delay; connect capacitor to GND for setting delay time Output; block to ground with a 22 F capacitor, ESR < 5 at 10 kHz. Data Sheet Version 1.3 3 2001-04-24 TLE 4275 Temperature Sensor Saturation Control and Protection Circuit 5 I 1 Q Bandgap Reference Buffer D 4 Reset Generator 3 2 RO AEB02425 Figure 2 Block Diagram Data Sheet Version 1.3 4 2001-04-24 TLE 4275 Absolute Maximum Ratings Parameter Symbol Limit Values min. Voltage Regulator Input Voltage Current Output Voltage Current Reset Output Voltage Current Reset Delay Voltage Current Temperature Junction temperature Storage temperature max. Unit Test Condition VI II - 42 - 45 - V - - Internally limited VQ IQ - 1.0 - 16 - V - - Internally limited VRO IRO - 0.3 -5 25 5 V mA - - VD ID - 0.3 -2 7 2 V mA - - Tj Tstg - 40 - 50 150 150 C C - - Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Data Sheet Version 1.3 5 2001-04-24 TLE 4275 Operating Range Parameter Input voltage Junction temperature Thermal Resistance Junction case Junction ambient Junction ambient Junction ambient Symbol Limit Values min. max. 42 150 5.5 - 40 Unit Remarks VI Tj V C - - Rthjc Rthj-a Rthj-a Rthj-a - - - - 4 53 78 65 K/W - K/W TO2631) K/W TO2521) K/W TO220 x 80 x 1.5 mm3, heat sink 1) Worst case, regarding peak temperature; zero airflow; mounted on a PCB FR4, 80 area 300 mm2 Characteristics VI = 13.5 V; - 40 C < Tj < 150 C (unless otherwise specified) Parameter Symbol Limit Values min. Output Output voltage Output voltage Output current limitation1) Current consumption; Iq = II - IQ Current consumption; Iq = II - IQ Current consumption; Iq = II - IQ Current consumption; typ. max. Unit Measuring Condition VQ VQ IQ Iq Iq Iq Iq 4.9 4.9 450 - - - - 5.0 5.0 700 150 150 5 12 5.1 5.1 - 200 220 10 22 V V mA A A mA mA 5 mA < IQ < 400 mA 6 V < VI < 28 V 5 mA < IQ < 200 mA 6 V < VI < 40 V - IQ = 1 mA; Tj = 25 C IQ = 1 mA; Tj 85 C IQ = 250 mA IQ = 400 mA Iq = II - IQ Data Sheet Version 1.3 6 2001-04-24 TLE 4275 Characteristics (cont'd) VI = 13.5 V; - 40 C < Tj < 150 C (unless otherwise specified) Parameter Drop voltage1) Load regulation Line regulation Power supply ripple rejection Temperature output voltage drift Symbol Limit Values min. typ. 250 15 5 60 0.5 max. 500 30 15 - - mV mV mV dB mV/ K - - - 15 - - Unit Measuring Condition Vdr VQ VQ PSRR dV Q ---------dT IQ = 300 mA Vdr = VI - VQ IQ = 5 mA to 400 mA Vl = 8 V to 32 V IQ = 5 mA fr = 100 Hz; Vr = 0.5 Vpp - Reset Timing D and Output RO Reset switching threshold Reset output low voltage Reset output leakage current Reset charging current Upper timing threshold Lower timing threshold Reset delay time Reset reaction time 1) VQ,rt VROL IROH ID,c VDU VDRL trd trr 4.5 - - 3.0 1.5 0.2 10 - 4.65 0.2 0 5.5 1.8 0.4 16 0.5 4.8 0.4 10 9.0 2.2 0.7 22 2 V V A A V V ms s - Rext 5 k; VQ > 1 V VROH = 5 V VD = 1 V - - CD = 47 nF CD = 47 nF Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V. Data Sheet Version 1.3 7 2001-04-24 TLE 4275 II CI 1 1000 F I CI 2 100 nF 1 5 Q IQ CQ 22 F R ext 5 k VI ID, d VD ID, c CD 47 nF D 4 3 GND 2 RO IRO VQ VRO IGND AES02472 Figure 3 Test Circuit V VQ < t rr t V Q, rt d V D,c = dt CD t V DU V DRL VD VRO t rd t rr t t Power-on-Reset Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Overload at Output AED03010 Figure 4 Reset Timing Data Sheet Version 1.3 8 2001-04-24 TLE 4275 Output Voltage VQ versus Temperature Tj 5.2 V 5.1 AED03029 Output Voltage VQ versus Input Voltage VI 12 AED01929 VQ VQ V 10 VI = 13.5 V 5.0 8 4.9 6 R L = 25 4.8 4 4.7 2 4.6 -40 0 40 80 120 C 160 0 0 2 4 6 Tj 8 V 10 V Output Current IQ versus Temperature Tj 1200 mA 1000 AED03034 Output Current IQ versus Input Voltage VI 1.2 AED03030 IQ IQ A 1.0 800 0.8 T j = 125 C 25 C 600 0.6 400 0.4 200 0.2 0 -40 0 40 80 120 C 160 0 0 10 20 30 40 V 50 Tj Data Sheet Version 1.3 9 VI 2001-04-24 TLE 4275 Current Consumption Iq versus Output Current IQ 3 AED03084 Drop Voltage Vdr versus Output Current IQ 800 mV 700 600 AED03031 q mA Vdr 2 500 400 V = 13.5 V 1 T j = 125 C 25 C 300 200 100 0 0 20 40 60 80 mA 120 0 0 200 400 600 mA 1000 Q IQ Current Consumption Iq versus Output Current IQ 80 mA 70 60 50 40 30 AED03085 Charge Current ID,c versus Temperature Tj 8 A I D, c 7 AED03086 q I D, c 6 5 4 3 VI = 13.5 V VD = 1 V V = 13.5 V 20 10 0 2 1 0 -40 0 100 200 300 400 mA 600 0 40 80 120 C 160 Q Tj 10 2001-04-24 Data Sheet Version 1.3 TLE 4275 Delay Switching Threshold VDU, VDRL versus Temperature Tj 4.0 V AED03083 V DU V DRL 3.5 3.0 2.5 V = 13.5 V 2.0 V DU 1.5 1.0 0.5 V DRL 0 -40 0 40 80 120 C 160 Tj Data Sheet Version 1.3 11 2001-04-24 TLE 4275 Package Outlines P-TO252-5-1 (D-PAK) (Plastic Transistor Single Outline) 2.3 +0.05 -0.10 B A 1 0.1 0...0.15 0.9 +0.08 -0.04 6.5 +0.15 -0.10 1 0.1 5.4 0.1 9.9 0.5 6.22 -0.2 0.8 0.15 (4.17) 0.15 max per side 0.51 min 5x0.6 0.1 1.14 0.5 +0.08 -0.04 0.1 4.56 0.25 M AB GPT09161 All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Data Sheet Version 1.3 12 Dimensions in mm 2001-04-24 TLE 4275 P-TO263-5-1 (SMD) (Plastic Transistor Single Outline) 10 0.2 9.8 0.15 A 8.5 1) 1.27 0.1 B 0.1 2.4 4.4 10.3 0.05 (15) 9.25 0.2 7.55 1) 0...0.15 5x0.8 0.1 4x1.7 4.7 0.5 2.7 0.3 0.5 0.1 8 max. 1) Typical All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Data Sheet Version 1.3 13 Dimensions in mm 2001-04-24 GPT09113_malac 0.25 M AB 0.1 TLE 4275 P-TO220-5-11 (Plastic Transistor Single Outline) 10 0.2 9.8 0.15 8.5 1) 3.7-0.15 4.4 1.27 0.1 A 15.65 0.3 12.95 1) 170.3 2.8 0.2 0.05 8.6 0.3 10.2 0.3 C 0...0.15 3.70.3 9.25 0.2 0.5 0.1 3.9 0.4 0.8 0.1 1.7 0.25 M 2.4 AC 8.4 0.4 1) Typical All metal surfaces tin plated, except area of cut. gpt09064_ma Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". Dimensions in mm Data Sheet Version 1.3 14 2001-04-24 TLE 4275 P-TO220-5-12 (Plastic Transistor Single Outline) 10 0.2 9.8 0.15 8.5 3.7 -0.15 1) A B 4.4 1.27 0.1 15.65 0.3 12.95 1) 170.3 2.8 0.2 0.05 110.5 C 0...0.15 1.7 13 0.5 6x 0.8 0.1 0.25 M 0.5 0.1 2.4 ABC 1) Typical All metal surfaces tin plated, except area of cut. gpt09065_mal Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". Dimensions in mm Data Sheet Version 1.3 15 2001-04-24 9.25 0.2 TLE 4275 Edition 2001-04-24 Published by Infineon Technologies AG i. Gr., St.-Martin-Strasse 53 D-81541 Munchen (c) Infineon Technologies AG 1999 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of noninfringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet Version 1.3 16 2001-04-24 |
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